1. Field of the Invention
The present invention relates to a device for testing semiconductor integrated circuits and a method of testing the same, and more particularly to a device and a method for use in conducting the probe test of semiconductor integrated circuits in the form of semiconductor wafers or of semiconductor chips before packaging.
2. Description of the Prior Art
In conducting the probe test of a semiconductor integrated circuit (IC), probe cards having a plurality of probe needles corresponding to the number of electrodes of the semiconductor IC have been used conventionally. According to this conventional method and device, end portions of probe needles of the probe card are brought into contact respectively with corresponding aluminum electrodes of the semiconductor IC so as to enable the input and the output of test signals into the semiconductor IC, thus making the test of the semiconductor IC possible. The same approach of testing has been used for semiconductor ICs having metal bump on electrodes thereof.
However, with the increase of apparatus which use semiconductor ICs having metal bump on electrodes, problems have arisen. When using conventional probe cards for testing the function of semiconductor ICs having metal bump, it is necessary to adjust the positions of end portion of each probe needle as well as to design and manually assemble probe cards so that end portion of each probe needle accurately make contact with corresponding metal bump on electrodes. To this end, a lot of skilled workers are needed and production time increases with the resultant higher production cost. Furthermore, the recent rapid advance in the device technique has been making an assembly and adjustment of probe needles extremely difficult since the number of electrodes in semiconductor ICs is increasing and intervals therebetween is becoming more and more close. Another disadvantage is that probe needles are susceptible to wear, and gap of height therebetween or slippage of position thereof may occur with the passage of time since each probe needle is inclined at 7.degree..about.9.degree. on a plane of semiconductor IC substrate. Yet another disadvantage is that metal bump of semiconductor ICs are easily scratched and damaged due to the contact with end portions of probe needles. As a result, improper contact may occur at the subsequent step of bonding lead to semiconductor ICs. In addition, favorable high frequency characteristic cannot be achieved since the use of probe needles induces noise interference.